Step-by-step guide to build a custom PetaLinux image for the ADRV9009 + ZCU102 after modifying the HDL reference design by Analog Devices.
How to build a Linux for a custom board with AMD MPSoC FPGA using the Yocto flow.
In this project, we are trying to measure and understand the latency of an AMD Versal AI Engine application
In this tutorial we are looking briefly at the AMD AI Engine compilation and Simulation tools and their generated outputs and reports
In this article we are having an introduction on AI Engine programming by analysing an example code
Leveraging AMD Vitis™ Unified Software Platform capabilities to create an optimal AMD Versal solution.
In this example we are going through the Vitis Acceleration flow to run a system with PS + PL + AIE-ML on the Trenz TE0950 board
Pruning the Yolov3 with Pytorch based pruning method and Quantizing/compiling the pruned model with Vitis AI for AMD-Xilinx KV260 FPGA.
Easily interface digilent digital discovery with CW305 to debug or validate design
Did you know that you can create your own Configurable Example Design to use in AMD Vivado?
Getting started with the Signaloid C0-microSD SoC using the RISC-V GNU Compiler Toolchain
Its time to try an FPGA design.
In this example we building a basic linux system for the Trenz TE0950 board
We’ve built a high-performance HDMI 2.0 pass-through system that supports 4K at 60Hz using the AMD Artix™ UltraScale+™ FPGA on the AUBoard
Yes, you heard it right! Unlike KV260, KR260 has a different display configuration. Let's find out!!
Want to learn about DMA and Linux Drivers? Create your own Linux Kernel Module to transfer data between PS and PL using this learning guide.
Through the aid of Verilog, an RTL level design of a motor controller system for two motors with encoders is realized in an FPGA.
Recreating the BIST app on 2025.1 for Kria Vision Kit.
Tutorial on how to use Xilinx Zynq-7000 XADC. Part 3 of 3 explains how to do write a SW application in AMD Xilinx Vitis Classic.
Deploy PetaLinux 2024.2 on ZCU104 with setup, boot, and custom apps for advanced embedded system development.
This is my first project! I designed hardware and software to run the classic 'snake' arcade game on a 24x24 NeoPixel array - FPGA based.
Getting Started with Infinite-ISP, the open source image signal processor on AMD Kria KV260 AI Starter kit.
This project walks through how to create a fixed hardware design (fixed platform) for the Zynq-7000 SoC in Vivado 2024.1.
This project walks through how to create an embedded Linux image for the ARM-core in the Zynq-7000 using PetaLinux 2024.1
