Signaloid C0-microSD Reference Design Build

Develop unique references for the all new FPGA Platform
Signaloid C0-microSD Reference Design Build
Signaloid C0-microSD Reference Design Build
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Contest Status
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Timeline

Challenge begins

March 5, 2025 at 12:00 PM PST

Proposal submissions close

March 28, 2025 at 12:00 PM PDT

Contenders announced

April 1, 2025 at 12:00 PM PDT

Solutions due

July 31, 2025 at 12:00 PM PDT

Solutions revealed

Jul 31, 2025